The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 29, 1998

Filed:

Apr. 24, 1996
Applicant:
Inventors:

Kurt Raymond Raab, San Jose, CA (US);

John McCormick, Redwood City, CA (US);

Assignee:

LSI Logic Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437211 ; 437209 ; 437214 ; 437217 ; 437219 ;
Abstract

Separate and distinct conductive layers for power and ground are insulated from one another and a patterned signal conductive layer to form a flexible substrate for mounting a semiconductor die in a semiconductor device assembly. TAB technology is utilized to produce an assembly that has superior electrical characteristics because power and ground is conducted on separate low impedance conductive layers. The power and ground leads connecting the semiconductor die and external circuits are selected from the signal trace layer, cut bent downward and attached by bonding to the respective power or ground layer. A tool is disclosed for cutting the selected leads. A method of attaching solder balls to a TBGA film using solder flux and photoimageable solder resist definition is also disclosed.


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