Dual source data distribution system for integrated circuit tester

Abstract

An integrated circuit (IC) tester employs both central and distributed data sources for controlling tester operation during a test. The tester includes a master controller, a central scan data source, and a set of tester nodes. Each tester node carries out a sequence of test actions at an IC terminal, each action being defined by a data word (test vector). Before the test sets of vectors are written into vector memories in the nodes and separate control data is loaded into registers in each node. During the test, the scan data source sends scan data words concurrently to all tester nodes, and each node stores them. The master controller sends a similar instruction to each tester node during each cycle of the test. Some instructions reference a vector stored in the node and instruct all tester nodes to carry out the action indicated by the referenced vector. Other instructions tell the tester nodes to alter a last read vector by replacing selected bits of the referenced vector with selected bits of a stored scan data word and then to carry out an action indicated by the altered vector. The control data tells each tester node which bits of the vector (if any) to replace and which bits of the scan data word are used as replacements. The scan data controls node operations during portions of a test when only a few nodes are actively changing their activities at their IC terminals from cycle to cycle.