The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 17, 1998

Filed:

Jan. 21, 1997
Applicant:
Inventors:

Dong-ho Ahn, Kyungki-do, KR;

Min-wook Hwang, Kyungki-do, KR;

Young-woo Park, Kyungki-do, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438443 ; 438448 ;
Abstract

Methods of forming field oxide isolation regions in a semiconductor substrate include the steps of exposing residual polysilicon defects contained within preliminary field oxide isolation regions and then performing a cleaning step to etch and reduce the size of the exposed defects (or eliminate the defects altogether). The preliminary field oxide isolation regions are then oxidized to preferably convert any remaining polysilicon defects into silicon dioxide and then a final oxide etching step is performed to define the shapes of the final field oxide isolation regions. Preferably, a pad oxide layer is formed on a face of a semiconductor substrate and then a masking layer is formed on the pad oxide layer, opposite the face of the substrate. The masking layer is then patterned to define an opening therein which exposes an upper surface of the pad oxide layer. An isotropic etching step is then performed on the pad oxide layer at the exposed upper surface thereof using the patterned masking layer as an etching mask. Polysilicon sidewall spacers are then formed in the opening at the sidewalls of the patterned masking layer. The portion of the substrate extending opposite the opening is then oxidized along with the polysilicon sidewall spacers to thereby define a preliminary field oxide isolation region which potentially contains residues of polycrystalline silicon therein which have not been fully oxidized. The preliminary field oxide isolation region is etched to expose the polysilicon residues. The exposed polysilicon residues are then etched in a cleaning solution to reduce their size and then an oxidation step is performed to convert any remaining portions of the polysilicon residues to silicon dioxide. Finally, the preliminary field oxide isolation region is etched to define a final field oxide isolation region on an electrically inactive portion of the substrate.


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