The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 13, 1998

Filed:

Jun. 18, 1996
Applicant:
Inventor:

Philippe Franck Piquet, Montigny-le-Bretonneux, FR;

Assignee:

Matra MHS, , FR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ; G11C / ;
U.S. Cl.
CPC ...
365205 ; 365207 ; 365203 ; 327 51 ; 327 52 ;
Abstract

A line amplifier for static RAM memory in CMOS technology comprises first and second branches formed by a first plurality of transistors (TP.sub.1, TN.sub.1, TN.sub.2) and a second plurality of transistors (TP.sub.2, TN.sub.3, TN.sub.2), respectively. The branches are connected in series between the power supply (Vdd) and reference voltage (Vss). A positive feedback is produced by direct connection through internal nodes, and an evaluation switching transistor makes it possible to equalize the values of the voltages on the internal nodes at equilibrium. Under read control (CL), the transistor (TN.sub.2) makes it possible to amplify the preliminary difference between voltage levels due to a transition of the bit signal (D) and complemented bit signal (D) applied to the internal nodes. A precharge transistor (TN.sub.4) is common to the first and second branches and thus allows an increase in switching speed.


Find Patent Forward Citations

Piquet, Philippe. (1998). Line amplifier for static ram memory (U.S. Patent No. 5822051). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5822051

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…