The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 13, 1998

Filed:

Oct. 17, 1996
Applicant:
Inventors:

J Neil Schunke, Durham, NC (US);

David Zaterka, Durham, NC (US);

Thomas S Taylor, Durham, NC (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
257296 ;
Abstract

An arched gate MOSFET having first and second source/drain regions formed spaced apart on a main surface of the semiconductor substrate, and a gate electrode formed on said main surface of the semiconductor substrate through an insulating film. The gate electrode extends in a first direction between the first and second source/drain regions defining a channel length, and in a second direction, perpendicular to the first direction, defining a channel width. The surface of the semiconductor substrate is arcuate in shape in the channel width direction and the gate electrode conforms to the arcuate shape of the surface of the semiconductor substrate.


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Schunke, J. (1998). Field effect transistor having an arched gate and manufacturing method (U.S. Patent No. 5821573). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5821573

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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