The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 1998

Filed:

Apr. 14, 1997
Applicant:
Inventors:

Eric Muller, Fonsorbes, FR;

Marc Masgrangeas, Muret, FR;

Augustin Coello Vera, Pibrac, FR;

Assignee:

Alcatel N.V., Amsterdam, US;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
257724 ; 257723 ;
Abstract

The invention concerns an MCM type high-density assembly of integrated circuits having a high reliability by virtue of its design and the means employed in its implementation. The essential feature of the assembly is the presence of one or more interconnection substrates in addition to at least one substrate carrying a plurality of unencapsulated electronic chips connected to the interconnection substrate(s) by conventional microwiring techniques, preferably through one or more apertures in the substrates. The interconnection substrate(s) is or are advantageously of the multilayer type. The assembly is adapted to be encapsulated thereafter in a hermetically sealed case in the manner that is standard for MCM. In various embodiments the unencapsulated chips can be attached to one or both sides of a supporting substrate, respectively in conjunction with the use of one or two interconnection substrates with apertures; a plurality of sets of two or three substrates formed in this way can be stacked either in one case or in separate cases designed to be stacked; the integrated circuits can be conventional two-dimensional chips or '3D' blocks of circuits integrated in three dimensions. The invention also concerns the method of implementation. Applications in the fields of space, the military and onboard or portable electronics of high processing power or high memory capacity.


Find Patent Forward Citations

Muller, Eric. (1998). High-density, highly reliable integrated circuit assembly (U.S. Patent No. 5818108). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5818108

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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