The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 06, 1998
Filed:
Jun. 11, 1996
Winbond Electronics Corporation, Hsinchu, TW;
Abstract
In accordance with the invention, an integrated circuit has a first ESD protection circuit for each input pin which is not adjacent a non-wired IC pin and a second ESD protection circuit for each input pin which is adjacent a non-wired pin. The second ESD protection circuit has a greater ESD protection capability than the first ESD protection circuit. The second ESD protection circuit has a capability of protecting an input pin when an ESD stress occurs at an adjacent non-wired pin. The second ESD protection circuit includes, for example, additional ESD protection elements in comparison to the first ESD protection circuit. Alternatively, the second ESD protection circuit has one ESD protection element which is larger in size or is otherwise different than a corresponding ESD protection element in the first ESD protection circuit. The invention has the advantage of not changing the definition of the non-wired IC pins and also does not cost large amounts of chip real estate because the ESD protection circuit is reinforced for only those input pins which are adjacent non-wired pins. The ESD protection circuit is not reinforced for I/O pins, VDD pins, VSS pins, and input pins which are not adjacent non-wired pins.