Semiconductor device and method of manufacturing the same

Abstract

In forming a P.sup.- body diffused layer in a portion on the source side of an N.sup.- drain diffused layer of a DMOSFET, P-type impurity ions are implanted at a large tilt angle to reach a part of a region underlying an N.sup.+ gate electrode by using, as a mask, a resist film having an opening corresponding to a region in which the body diffused layer of the DMOSFET is to be formed and the N.sup.+ gate electrode so as to be activated. Thereafter, an N.sup.+ source diffused layer and an N.sup.+ drain diffused layer are formed in the P.sup.- body diffused layer and in the N.sup.- drain diffused layer, respectively. Since a high-temperature drive-in process need not be performed to introduce the P-type impurity ions into the region underlying the N.sup.+ gate electrode, a reduction or variations in threshold voltage and the degradation of a gate oxide film each caused by the impurity diffused from the N.sup.+ gate electrode can be prevented. Consequently, there is provided a semiconductor device having a DMOSFET mounted thereon which has a reduced on-resistance and suppresses the activation of a parasitic bipolar transistor due to reduced variations in threshold voltage and a high-quality gate oxide film.