The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 06, 1998
Filed:
Mar. 20, 1997
Applicant:
Inventors:
George Averkiou, Upland, CA (US);
Philip A Trask, Laguna Hills, CA (US);
Assignee:
Raytheon Company, Lexington, MA (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438107 ; 438622 ;
Abstract
Methods of producing a chip scale package that enables any chip with peripheral bond pads to be converted to an area array chip scale package suitable for chip on board assembly. The present invention produces the equivalent of a flip chip die when a chip supplier does not provide one. Processing is performed that provides thin film metal interconnections between the chip bond pads and area array bond pads on the bottom of the package. High reliability thin film metal interconnections are thus provided that connect the bond pads of the chip to the area array bond pads to permit external connection to the chip.