The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 29, 1998
Filed:
Nov. 01, 1996
Bing-Yau Lu, Chungho, TW;
Holtek Microelectronics, Inc., Hsinchu, TW;
Abstract
A method of fabricating high step alignment marks on a twin-well integrated circuit. An alignment mark photoresist pattern is formed overlaying the nitride layer using lithography technique. The nitride layer is partially etched to form a nitride alignment pattern using the alignment mark photoresist pattern as a mask. After the formation of N-well and P-well regions using lithography technique, the N-doped and P-doped impurities are subject to a thermally drive in process to activate and form N-well and P-well regions, respectively. At the same time, the pad oxide layer overlaying the N-well and P-well regions and the region not covered by the nitride alignment pattern is converted to a thermal oxide layer. The thermal oxide layer can be removed to reveal a recessed portion on the surface of the P-type silicon substrate, whereby the thickness of the nitride layer plus the depth of the recessed portion causes high step alignment marks to be formed.