The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 08, 1998

Filed:

Sep. 26, 1995
Applicant:
Inventors:

Ravi Nagaraj, Hillsboro, OR (US);

Aniruddha Kunda, Hillsboro, OR (US);

James Akiyama, Beaverton, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395306 ; 395308 ; 395309 ; 395200 ; 395800 ; 364242 ; 364240 ;
Abstract

An apparatus and method for enabling a Peripheral Component Interconnect ('PCI') bus to support direct memory access ('DMA') transfers. The apparatus comprises a plurality of DMA controllers, a state machine and an internal storage element. The plurality of DMA controllers transfers DMA requests for an electronic device to the state machine and DMA acknowledges from the state machine to the electronic device. The state machine controls the DMA transfer by performing two transactions for each DMA transfer; namely, a memory cycle and an input/output cycle. The internal storage element acts as a buffer for this multiple cycle DMA transfer.


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Nagaraj, Ravi. (1998). Apparatus, system and method for supporting dma transfers on a (U.S. Patent No. 5805842). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5805842

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