The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 01, 1998

Filed:

Sep. 13, 1996
Applicant:
Inventors:

Yong Kwon Kim, Chungcheongbuk-do, KR;

Nae Hak Park, Seoul, KR;

Assignee:

LG Semicon Co., Ltd., Chungcheongbuk-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
438666 ; 438637 ; 438700 ; 438638 ;
Abstract

A method of forming an interconnection for a semiconductor device includes the steps of: forming a lower conductive line on a semiconductor substrate and forming a first insulating layer on the semiconductor substrate and the lower conductive line; patterning the first insulating layer to form a first insulating layer pattern which is narrower than the lower conductive line on the lower conductive line; forming a second insulating layer on an overall surface of the substrate and on the first insulating layer pattern, to planarize a surface of the second insulating layer; patterning the second insulating layer to expose a surface of the first insulating layer pattern and to form a first trench wider than the first insulating layer pattern on an upper portion of the first insulating pattern; removing the first insulating layer pattern, to thereby form a second trench at a lower portion of the first trench; and filling the first and second trenches with conductive material, to thereby form an upper conductive line.


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