The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 04, 1998

Filed:

Sep. 22, 1995
Applicant:
Inventor:

Satya N Chillara, San Jose, CA (US);

Assignee:

National Semiconductor Corporation, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H05K / ;
U.S. Cl.
CPC ...
361719 ; 174 524 ; 257675 ; 361813 ; 361773 ;
Abstract

An integrated circuit package includes a first lead frame attached to the top surface of a substrate or interposer on which the die is mounted, and a second lead frame attached to the bottom surface of the interposer. The first lead frame is connected to bonding pads on the die by conventional means, and the second lead frame is attached to different bonding pads on the die by means of traces in the interposer and vias which extend through the interposer. The result is a package having a substantially greater lead density than packages which contain only a single lead frame.


Find Patent Forward Citations

Chillara, Satya. (1998). High density integrated circuit package including interposer (U.S. Patent No. 5790378). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5790378

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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