The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 07, 1998

Filed:

May. 21, 1997
Applicant:
Inventors:

Bidyut K Bhattacharyya, Chandler, AZ (US);

Debendra Mallik, Chandler, AZ (US);

Ron Vitt, Phoenix, AZ (US);

David B Kline, Tempe, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
174 524 ; 174 522 ; 361813 ; 257690 ; 257691 ; 257692 ; 257700 ; 257750 ; 257758 ; 257762 ; 257773 ; 257774 ; 257787 ;
Abstract

A multi-layer integrated circuit package which contains layers of dielectric that substantially reduce metal migration between the metal conductors of the package. The package has metal baseplates that are separated from a lead frame by a plurality of dielectric tapes. The integrated circuit is mounted to the baseplate which has a plurality of tabs that are connected to the lead frame of the package. The power or ground leads of the package are bonded to the corresponding baseplate through the tabs of the metal plate. The lead frame, metal baseplate and dielectric tapes all have center openings to provide clearance for the integrated circuit. The center opening of the tapes are such that the dielectric material extends beyond the ends of the baseplates and lead frame.


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