The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 16, 1998
Filed:
Jun. 11, 1996
Gary Solomon, Hillsboro, OR (US);
Jeff Rabe, Rancho Cordoya, CA (US);
Darren Abramson, Folsom, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A collection buffering scheme for a computer system having agents of a pre-emptible bus and a non-pre-emptible bus. An agent of the non-pre-emptible bus, having a data width capability of N bits, when receiving a grant to write to the pre-emptible bus, writes instead to a collection buffer capable of holding a block of more than one N bit data segments. When the collection buffer is filled, the collection buffer writes the entire block of data segments over the pre-emptible bus to a CPU or memory of the computer system. Preferably, the collection buffer is filled when the block size is equal to the data width capability of the pre-emptible bus, such that a single write to the pre-emptible bus utilizes the entire capacity of pre-emptible in a given data transaction. Further, where the system has a CPU posting buffer, a system lock-up prevention negotiator is provided that drains and disables the CPU posting buffer during the data transaction.