Multi-state non-volatile semiconductor memory and method for driving the

Abstract

A non-volatile integrated circuit memory device includes an array of memory cells. Each of a plurality of word lines corresponds to a respective row of memory cells, and each of a plurality of bit lines corresponds to a respective column of the memory cells. A current supplying transistor includes a source coupled to a supply voltage source, a gate coupled to a static voltage source, and a drain coupled to the bit lines. The current supplying transistor provides a static current to the bit lines during data read operations. A storage unit has a pair of latches coupled to respective input/output lines to perform a data exchange. The latches are further coupled to respective bit lines to perform a sense operation during the data read operation. Each of a pair of storage control transistors is associated with a respective one of the latches, and each of the storage control transistors inverts and maintains a state of data latched in the storage unit in accordance with levels of the bit lines and in response to enable signals applied thereto during a reading operation. An initialization transistor is connected to each of the bit lines, and the initialization transistor initializes the storage unit in response to a control signal applied thereto before execution of the reading operation while maintaining the bit lines at a respective predetermined voltage levels. A pair of program data transmission transistors are each arranged between a respective one of the latches of the storage unit and a respective bit line associated with the respective latch. Each of the programmed data transmission transistors transmits data latched in the respective latch to the associated bit lines during a programming operation.