The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 09, 1998
Filed:
Apr. 07, 1997
Thomas Kevin Johnston, Austin, TX (US);
William Daune Atwell, Jr, Spicewood, TX (US);
David Russell Tipple, Austin, TX (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
A method and system for performing memory repair via redundant rows of memory uses memory elements (208 and 210) for redundant row selection instead of conventional fuses. An on-chip test controller (110) is capable of testing memory rows (106) either at wafer probe, at final testing after manufacturing, or after memory chip packaging and/or final sale to end users. If this testing identifies faulty memory rows in the memory array at any time, the electrically programmable memory elements (208 and 210) can be internally re-programmed to create a new memory configuration which includes redundant memory rows (108). This new memory configuration is enabled in order to remove the newly-detected and previously-detected faulty memory rows from active memory in the memory array.