The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 02, 1998
Filed:
Sep. 30, 1996
Henry Lee, San Francisco, CA (US);
VLSI Technology, Inc., San Jose, CA (US);
Abstract
A method for monitoring contamination in a semiconductor wafer uses a capacitance-frequency measurement on MOS structures to calculate an impurity concentration. The silicon substrate along with an oxide layer is first biased into the inversion region using a variable frequency waveform generator superimposed upon a DC voltage bias. Next, the capacitance of the wafer is measured as a function of the varying frequency in order to develop a capacitance versus frequency curve. From this frequency response, a bandwidth (BW) is measured at a particular normalized capacitance point. The impurity concentration N is then derived using the formula N=G.times.BW, where G is the correlation constant. With an a priori knowledge of impurity concentration, N, the constant G may be derived by measuring a bandwidth of the capacitance versus frequency curve. Once the constant G is determined, future evaluation of impurity concentration can be made by a capacitance measurement. The method can be used on finished product wafers or as a routine monitoring tool on pre-processed wafers.