The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 26, 1998
Filed:
Jan. 03, 1997
Kazuo Kenmoku, Tokyo, JP;
Shigeo Tominaga, Tokyo, JP;
Yukio Hirano, Tokyo, JP;
Norio Kanno, Tokyo, JP;
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Abstract
The invention provides a test system of a fault detecting means, in which, during a normal operation, a fault forcibly generating circuit lets a transmission path signal inputted from the outside pass through as it is, generates a test signal which is the same as that of the transmission path signal, and outputs it to a fault detecting circuit. During a time of testing, the fault forcibly generating circuit outputs 'Low' level of the test signal forcibly to the fault detecting circuit, according to a test control signal outputted from a control portion. When the fault detecting circuit detects this test signal, an step-out alarm is generated and transmitted to the control portion. The control portion monitors the step-out alarm from the fault detecting circuit. The control portion judges the operation to be normal if the step-out alarm is outputted, and to be abnormal if the step-out alarm is not outputted under the condition that the step-out alarm is not outputted at the time of non-testing.