The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 26, 1998

Filed:

Apr. 23, 1996
Applicant:
Inventors:

Raul Edmundo Acosta, White Plains, NY (US);

James Hartfiel Comfort, New City, NY (US);

Alfred Grill, White Plains, NY (US);

David Edward Kotecki, Hopewell Junction, NY (US);

Katherine Lynn Saenger, Ossining, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01G / ;
U.S. Cl.
CPC ...
3613214 ; 361312 ; 361313 ; 3613014 ; 3613212 ; 257303 ; 257310 ; 257304 ; 257306 ;
Abstract

Structures for memory cell applications, including capacitors for DRAM and ferroelectric memory cells from FRAM, whose method of manufacture consists of depositing a ferroelectric or high-epsilon dielectric material to completely fill a cavity whose geometrical width is the sole determinant of the thickness of the electrically active portion of the ferroelectric or high-epsilon dielectric layer in the final device. In the preferred embodiment, the cavity into which the dielectric is deposited is defined by the gap between the plate and stack electrodes which are deposited and patterned in a through-mask plating step prior to the dielectric deposition.


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