The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 12, 1998

Filed:

Dec. 28, 1995
Applicant:
Inventors:

Byron Gillespie, Phoenix, AZ (US);

Marc Goldschmidt, Tempe, AZ (US);

Terry Sych, Gilbert, AZ (US);

Bruce Young, Tigard, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ;
U.S. Cl.
CPC ...
395306 ; 395309 ; 395500 ; 370402 ;
Abstract

A method and apparatus for interfacing a device which is compliant to a first bus protocol to a second bus having a second protocol and for providing virtual functions through an intelligent bridge. The interface apparatus is coupled to the first bus and the second bus. The interface device detects a configuration cycle on the second bus and translates the configuration cycle into a corresponding cycle in a format understandable by the first bus. The bus cycle is executed on the first bus. A local processor is interrupted by the interface apparatus. A verification and correction program is executed by the local processor to restore configuration header values if the executed bus cycle violated the protocol of the second bus. The interface apparatus insures that requests for access to the first bus are blocked during the execution of the verification and correction program.


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