The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 12, 1998
Filed:
Mar. 29, 1996
Applicant:
Inventors:
Peter O Butler, Hillsboro, OR (US);
Ricardo E Suarez-Gartner, Beaverton, OR (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K / ;
U.S. Cl.
CPC ...
361773 ; 361758 ; 361756 ; 361760 ; 361770 ; 361807 ; 361809 ; 361765 ; 2281231 ; 257684 ; 257686 ; 257780 ; 174 524 ; 174 521 ; 174250 ; 174255 ; 437203 ; 437209 ; 437180 ;
Abstract
A method and apparatus for reducing warpage of an assembly substrate and providing registration between a surface mount technology (SMT) component and the assembly substrate. The SMT component includes mounting pins extending from the component and capable of engaging corresponding apertures in the assembly substrate. Each mounting pin is registrable with a corresponding aperture in the assembly substrate. The mounting pins are capable of providing an interference fit between the SMT component and the assembly substrate.