The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 1998

Filed:

Dec. 05, 1996
Applicant:
Inventors:

Douglas John Dromgoole, San Diego, CA (US);

Anatoly Feygenson, Hillsboro, NJ (US);

Robert Charles Frye, Piscataway, NJ (US);

Ashraf Wagih Lotfi, Rowlett, TX (US);

King Lien Tai, Berkeley Heights, NJ (US);

Assignee:

Lucent Technologies Inc., Murray Hill, NJ (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F / ; H03H / ;
U.S. Cl.
CPC ...
323902 ; 363147 ; 361818 ; 361782 ;
Abstract

A silicon-on-silicon dual MCM apparatus comprising a printed circuit board having a voltage isolation boundary contained therein supporting a pair of multi-chip modules on either side of the voltage isolation boundary. The MCMs safely convey signals across the isolation boundary via discrete optical coupling means or the like. The optical coupling means allow safe and efficient conveyance of signals across the voltage isolation boundary enabling a designer to group high voltage components on one side of the boundary and low voltage components on the other side of the boundary. This obviates to a degree the need for multi-layered PCBs. A relatively large number of passive components (resistors and capacitors) are integrated into a silicon substrate with flip-chip analog integrated circuits (ICs). Operational characteristics of the controller are verified after integration and are compared to the discrete version. High voltage isolation requirements, interference, and noise are all considered to determine the most critical portions of the dual MCM layout and design.


Find Patent Forward Citations

Dromgoole, Douglas. (1998). Multi-chip modules with isolated coupling between modules (U.S. Patent No. 5747982). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5747982

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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