The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 21, 1998

Filed:

Jul. 11, 1994
Applicant:
Inventors:

Jay Sturges, Orangevale, CA (US);

Greg Hibdon, Folsom, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
39549701 ; 395405 ; 395406 ; 395481 ; 395413 ; 395600 ;
Abstract

In a computer system having a CPU coupled to a memory wherein the memory is logically divided into a number of logical units, each having a number of memory words, a free memory block header list having a number of free memory block headers, one for each free memory block of a memory pool having a number of the memory words, is provided for tracking free memory blocks in the memory pool. The free memory block headers are organized as a Cartesian binary tree. The free memory block header list is used and maintained to control dynamic allocation and deallocation of free and allocated memory blocks of the memory pool. The memory pool is designed to have a memory pool size in multiples of the memory's logical units. All memory requests are rounded to multiples of the memory's word size. As a result, free and allocated memory blocks of the memory pool may be dynamically allocated and deallocated independent of how the memory is addressed, in particular, whether the memory is virtually or statically addressed.


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