The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 24, 1998
Filed:
Jun. 28, 1996
Applicant:
Inventors:
William Thomas Motsiff, Essex Junction, VT (US);
Robert Michael Geffken, Burlington, VT (US);
Ronald Robert Uttecht, Essex Junction, VT (US);
Assignee:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
257529 ; 257762 ; 257763 ; 257764 ; 257766 ; 257774 ;
Abstract
A semiconductor interconnection consists of a corrosion resistant integrated fuse and Controlled, Collapse Chip Connection (C4) structure for the planar copper Back End of Line (BEOL). Non copper fuse material is directly connected to copper wiring.
Quick Actions:
Motsiff, William. (1998). Integrated pad and fuse structure for planar copper metallurgy (U.S. Patent No. 5731624). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5731624
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile