The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 03, 1998
Filed:
Oct. 20, 1993
Applicant:
Inventors:
Shivaling S Mahant-Shetti, Richardson, TX (US);
Mark G Harward, Dallas, TX (US);
Lawrence A Arledge, Jr, Dallas, TX (US);
Ravishankar Sundaresan, Carrollton, TX (US);
Assignee:
Texas Instruments Incorporated, Dallas, TX (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
326 85 ; 327544 ; 326103 ;
Abstract
A device is disclosed which combines the advantages of CMOS and bipolar using an existing parasitic bipolar device. As such high on-chip density is attainable with the device along with high speed capability while maintaining low power advantages.
Mahant-Shetti, Shivaling. (1998). Cmos with parasitic bipolar transistor (U.S. Patent No. 5723988). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5723988
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile