The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 10, 1998
Filed:
Oct. 21, 1996
Jeffrey L Rabe, Gold River, CA (US);
Nicholas D Wade, Folsom, CA (US);
Bruce Young, Tigard, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Apparatus and a method for eliminating deadlock in a multibus computer system which system includes a primary bus, and a secondary bus, a bridge circuit for joining the primary bus to a bus master, and a second bridge circuit for joining the primary bus to the secondary bus. The invention causes the second bridge circuit to generate a first signal directed to the all bridge circuits to indicate that a bus master on the secondary bus desires access to the secondary bus. All bridge circuits holding data directed to a component on the secondary bus flushes all temporary storage means holding data directed to a component on the secondary bus. The bridge circuits then generate signals to indicate that flushing is complete and the bus master on the secondary bus is granted access to the secondary bus. In one embodiment, the second bridge tests to determine whether the bus master requesting access requires a guaranteed access time and generates a signal to flush temporary storage in the first bridge between memory and the bridge.