The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 13, 1998

Filed:

May. 30, 1996
Applicant:
Inventors:

Satoshi Teramae, Chiba, JP;

Michiaki Hiyoshi, Yokohama, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
257727 ; 257181 ; 257688 ; 257719 ; 257785 ; 257723 ;
Abstract

IGBT chips and FRD chips are arranged on the same plane so as to be press-contacted by an emitter press-contact electrode plate and a collector press-contact electrode plate at the same time. The FRD chips are arranged at a central portion, and the IGBT chips are arranged at the peripheral portion of the FRD chips. A resin substrate having an opening in its contact portion between a main surface of each of said chip and the emitter press-contact electrode plate is provided between both press-contact electrode plates. Gate press-contact electrodes are formed on the resin substrate to be electrically connected to a gate electrode of each of the IGBT chips. Also, gate wires are fixed to the resin substrate to supply a control signal for controlling the IGBT chips to the gate electrode of the IGBT chips from the gate wires through the gate press-contact electrode.


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