The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 30, 1997

Filed:

Jul. 03, 1996
Applicant:
Inventor:

Mark S Shipman, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
39518318 ;
Abstract

A method and apparatus in a personal computer for performing a basic input/output system (BIOS) power on system test (POST) that uses three data patterns. The first data pattern (plus Inverse pattern) is used to test data bit integrity. the second data pattern (plus inverse pattern) encoded by address is used to test address line integrity. The third pattern is a pattern where all bits are null. Each pattern is 64 bits wide (a 32 bit data pattern plus 32 bit inverse data pattern). The test uses the Processor or Main Memory Controller's Byte Enables to speed the execution of the test. This is optimized for both 32 and 64 bit data paths. The invention has the advantage that it uses a 64 Bit data test, finds Data Bit and Address Line failures, tests boundary conditions rather than every data point, and results in very fast execution.


Find Patent Forward Citations

Loading…