The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 30, 1997

Filed:

Apr. 25, 1995
Applicant:
Inventor:

Sanjay Dhar, Lake Oswego, OR (US);

Assignee:

Mentor Graphics Corporation, Wilsonville, OR (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
364578 ;
Abstract

A switch level simulator having switch level speeds with near the accuracy of a circuit level simulator. Circuit parameters such as peak current, delay, and charge are calculated by using a dynamic short-circuit ratio. In the preferred embodiment a computer having a processor and memory is used to run the circuit simulations. A lookup table is built which represents how the circuit parameters vary with a change in the dynamic short-circuit ratio. The dynamic short-circuit ratio is calculated by taking the ratio of a first resistance in a first circuit path switching OFF to a second resistance in a second circuit path switching on. The circuit paths might be a parallel or series set of transistors which need to be combined to form an effective resistance for each path. The calculated dynamic short-circuit ratio is then used in the lookup table to determine the parameters in question.


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