The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 30, 1997

Filed:

Jan. 10, 1995
Applicant:
Inventors:

Toyokazu Nakamura, Tokyo, JP;

Yasuko Hanagama, Tokyo, JP;

Tohru Tsujide, Tokyo, JP;

Kenji Morohashi, Kanagawa, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R / ;
U.S. Cl.
CPC ...
324751 ; 324 713 ; 250207 ;
Abstract

In a fault analysis of large-scale integrated (LSI) circuits, a potential distribution image of a non-defective product and another potential distribution image of a defective product are displayed alternately and continuously in time, so that it is possible to acquire in real time an image of any location within a whole surface of the LSI chip. As a result, it can be viewed as if the potential distribution image of the non-defective product and the potential distribution image of the defective product are overlapped or superimposed with over time. Accordingly, a different portion between the non-defective and defective potential distribution images can be seen distinguishably from a coincident portion between the non-defective and defective potential distribution images, so that it is possible to trace the different portion in real time.


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