Apparatus and method for sharing first-in first-out memory space between

Abstract

A random access memory (RAM) device that allocates memory cells to first-in first-out (FIFO) memory. The RAM device has an array of addressable memory cells that are selected by row and column decoders. The memory cells and decoders have dual read and write lines that allow simultaneous read and write operations on the memory cells. The memory cells can store data from at least two data streams including, by way of example, a stream of U data and a stream of V data from an input device such as a YUV video processor. The RAM device includes a control circuit which generates separate read and write pointers for the U and V data. The control circuit also generates separate U and V minimum and almost full trigger pointers. Data is written into the memory cells until a write pointer reaches either a minimum trigger pointer or an almost full trigger pointer. When a write pointer exceeds a minimum or almost full trigger pointer, the control circuit requests that data be read from the memory cells so that morse data can be written into the memory cells. The minimum and almost full trigger pointers are programmable so that the memory space allocated to each data stream is dynamically variable.