The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 09, 1997

Filed:

Dec. 22, 1995
Applicant:
Inventor:

Sivakumar Makineni, Sunnyvale, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
36474803 ;
Abstract

An apparatus and method for performing variable precision floating point rounding operations is provided that accomplishes rounding of a number that is faster, less complex and requires less hardware than conventional devices. The apparatus and method provides for a single uniform incrementer located at the zero position that can add a logic 1 to that position. After the Round, Guard and Sticky bits are produced, logic 1s are inserted in the bit positions to the right of the significant bits of the result with a check unit. The check unit then outputs the intermediate result to an incrementer and a zero-out unit. The incrementer adds a 1 to the zero position and the carry function of the incrementer by operation ripples through the series of 1s up to the rightmost position of the resultant mantissa leaving a trail of zeroes behind producing a first output. Finally, a multiplexer is provided to choose between the first output and the second output as the final result.


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