The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 25, 1997
Filed:
Dec. 18, 1996
Applicant:
Inventor:
Dimitris Pantelakis, Folsom, CA (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395556 ; 327296 ; 327536 ;
Abstract
A clock generation circuit which includes a first circuit for generating first and second trains of non-overlapping and opposite phase clock pulses from an input train of clock pulses, and second and third circuits each for generating a pair of non-overlapping and opposite phase trains of clock pulses from one of the first or second trains of opposite phase clock pulses provided by the first circuit.
Pantelakis, Dimitris. (1997). Method and apparatus for generating four phase non-over lapping clock (U.S. Patent No. 5692164). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5692164
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile