The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 18, 1997
Filed:
Jul. 02, 1996
Yoshiyuki Tsuru, Shimodate, JP;
Shigeharu Arike, Shimotsuga, JP;
Takashi Sugiyama, Shimodate, JP;
Shinjirou Miyashita, Shimodate, JP;
Takayuki Suzuki, Shimodate, JP;
Hitachi Chemical Company Ltd., Tokyo, JP;
Abstract
A process for forming a multilayer printed wiring board comprising integrally laminating a plurality of insulating circuit boards having circuits formed on insulating substrates and interlaminar insulating layers sandwiched between adjacent insulating circuit boards, and forming via holes for making electrical connection between two or more layers of circuits. Where the difference between the glass transition point of an interlaminar insulating layer and that of the adjoining insulating substrate is not greater than 60.degree. C., proof against exfoliation due to heat history of the board and high reliability of insulation and through-hole connection is achieved. The interlaminar insulating layers desirably are B-staged and have a B-stage resin flow of less than 1%.