The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 11, 1997

Filed:

Dec. 23, 1994
Applicant:
Inventor:

Walter S Matthews, Folsom, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11B / ;
U.S. Cl.
CPC ...
395-21 ; 369 30 ;
Abstract

A method for retro-storing analog information in a memory circuit first processes first analog data into first digitized data. The first digitized data are then stored in the memory circuit. Second analog data are then received and processed into second digitized data. If storage of the analog information is now required, the second digitized data are stored with the first digitized data in the memory circuit. If storage is not required, the first digitized data are deleted from the memory circuit and the second digitized data are stored in the memory circuit. An integrated storage circuit for retro-storing and retrieving analog information is also described. The circuit includes a control circuit for controlling a processing circuit to store digitized analog data in a nonvolatile memory in response to a control signal. When the control signal is not asserted, the control circuit controls the digitized analog data to be stored in the buffer circuit in a closed loop manner. When the control signal is asserted, the control circuit controls (1) the digitized analog data received after the control signal is enabled and (2) the digitized analog data already stored in the buffer circuit into the nonvolatile memory.


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