The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 04, 1997

Filed:

May. 26, 1993
Applicant:
Inventors:

Kevin Harney, Brooklyn, NY (US);

Mike S Kelly, Phoenix, AZ (US);

Gary Loeser, Ocean, NJ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04N / ;
U.S. Cl.
CPC ...
348390 ; 342402 ; 342405 ; 342413 ; 342416 ;
Abstract

A video processor system has separate and independent video processors for performing a variety of video processor functions required for encoding and decoding video signals. Each of the separate video processors performs its own individual set of video processor functions. During the encode process the first video processor performs motion estimation to provide motion estimation information which it applies to the second video processor. The second video processor receives the motion estimation information and performs forward and inverse discrete cosine transforms, quantization and dequantization, frame addition and frame differencing, as well as run length encoding. The run length encoding operation produces run/value pairs which are then applied to the first video processor. The first video processor performs variable length encoding upon the run/value pairs. During the decoding process the first video processor performs a variable length decode and applies the variable length decoded data to the second video processor. The second video processor performs run length decoding, dequantization, inverse discrete cosine transforms and frame addition according to the received variable length data. The inverse transformed data produced by this operation is then applied to the first video processor.


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