Digital testing of analog memory devices

Abstract

An analog memory has comparison logic and a reference voltage generator built on-chip for testing of analog write and read processes. During a test, the reference voltage generator, which may be a resistor tree structure, provides a set of intermediate voltages. One of the intermediate voltages V.sub.IN is written to a selected memory cell. The comparison logic compares other intermediate voltages V.sub.H and V.sub.L to an analog output signal generated by reading the selected memory cell. A digital control signal from an external digital tester selects the levels of voltages V.sub.IN, V.sub.H, and V.sub.L. Typically, voltages V.sub.H and V.sub.L are equal V.sub.IN .+-..DELTA.V where .DELTA.V represents an acceptable resolution for stored analog data. If the signal from reading the selected memory cell falls within a desired range V.sub.IN .+-..DELTA.V, an output digital result signal is set; otherwise, the test result signal is cleared. A low-cost digital tester which generates the digital control signals and observes the digital result signal can test all the circuits associated directly with write and read processes. Since the analog signals for the test are generated on-chip, the effect of noise is minimized, and a high accuracy resolution test is achieved.