The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 30, 1997
Filed:
Jan. 18, 1996
Yutaka Saito, Tokyo, JP;
Takao Akiba, Tokyo, JP;
Koju Nonaka, Tokyo, JP;
Masaaki Kamiya, Tokyo, JP;
Hitomi Watanabe, Tokyo, JP;
Seiko Instruments Inc., , JP;
Abstract
The present invention is provided for improving latch-up resistance in a semiconductor integrated circuit device employing CMOS structure, for preventing the photoelectric carriers from getting into the sensors and improving the afterimage characteristic in a semiconductor image sensor device, and for impurity the switching characteristic in a semiconductor device having bipolar element. An electron beam of over 2 MeV and 1E15/cm.sup.2 is irradiated to a monocrystal silicon semiconductor region in a substrate and then annealing is performed at a high temperature of over 200.degree. C. As a result, at 150 K., a shallow level traps of which the activation energy from a valence band EV is under 0.1 eV and which is produced at the concentration of about 1.2-1.7E15/cm.sup.3, and a deep level traps of which the activation energy is 0.28-0.32 eV and which is produced at the concentration of about 1.6-2.0E13/cm.sup.3 are obtained. Then a semiconductor substrate having both the level traps stated above as recombination centers in a band gap of silicon is obtained. The chip size of this semiconductor substrate doesn't increase, and furthermore the cost of it is low as an epi wafer is not used. As well, it is possible to manufacture a semiconductor integrated circuit device just before or just after a process step of evaluating the electrical characteristic of a semiconductor integrated circuit device.