The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 23, 1997
Filed:
Oct. 19, 1995
Applicant:
Inventors:
Peter J Kazarian, Cupertino, CA (US);
Bruce B Pedersen, San Jose, CA (US);
Francis B Heile, Santa Clara, CA (US);
David Wolk Mendel, Sunnyvale, CA (US);
Assignee:
Altera Corporation, San Jose, CA (US);
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
326 39 ; 326 40 ;
Abstract
Logic signal routability in programmable logic array integrated circuit devices is improved by selecting the possible interconnections between various resources on the device so that various constraints or goals are satisfied. Improving routability in this way tends to reduce instances in which desired interconnections are blocked by other connections that have already been made.