The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 09, 1997

Filed:

May. 24, 1996
Applicant:
Inventors:

Takeshi Uenoyama, Kyoto, JP;

Yasuhito Kumabuchi, Osaka, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
257 30 ; 257 25 ; 257 37 ; 365159 ; 365190 ;
Abstract

An n-type diffusion layer, an insulating layer and a first aluminum electrode are formed on a p-type silicon substrate. Fe.sup.2+ (divalent Fe) having a vacant orbit not filled with an electron is implanted into a region of the insulating layer to form an impurity atom layer. A second aluminum electrode is formed which is in contact with the n-type diffusion layer. A voltage that increases the potential of the first aluminum electrode is applied between the first and second aluminum electrodes. The voltage is increased. In this situation, when the fermi level of the n-type diffusion layer and an impurity level which is the energy level for filling the vacant orbit of the Fe.sup.2+ are matched, a resonance tunnelling current flows. Thereafter, when there is a change to the state of non-resonance state, a negative-resistance characteristic is exhibited in which the current decreases as the voltage is increased. Accordingly, the present invention is able to provide a low-power, low-voltage, fast nonlinear element that can well be incorporated into the integrated circuit, and a bistable memory device employing such an improved nonlinear element.


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