The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 02, 1997

Filed:

Oct. 26, 1994
Applicant:
Inventors:

Chengwu Chen, Sacramento, CA (US);

Michael E Pierce, Sacramento, CA (US);

James L Foote, III, Sacramento, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ;
U.S. Cl.
CPC ...
395733 ; 395651 ; 395652 ;
Abstract

A system for accessing attribute memory on a card using the interrupt capability of a microcontroller on the PCMCIA card intended to perform I/O functions for the host. The attribute memory interfaces directly with the microcontroller. A PLD is connected between the host bus and the microcontroller decodes the host's bus signals and generates an interrupt signal when it detects a request for access to the attribute memory which signal is supplied to the microcontroller. Upon receipt of the interrupt signal, the microcontroller runs a special routine that accesses attribute memory and supplies the results to the host. The PCMCIA card has a configured state in which the host has read the configuration information from attribute memory and has allocated necessary system resources. The PCMCIA card is in an unconfigured state if the foregoing has not been accomplished. The programmable logic device contains an AND gate having one of its inputs connected to the lines of the bus relating to the I/O function and a second input connected to the microprocessor for receiving a card enable signal, having at least two logic states. The control signals are passed to the microcontroller when the card enable signal is in one of the two logic states. The method consists of the steps of decoding the bus signals; when the host requests access to attribute memory, generate an interrupt signal and supply it to the microcontroller; the microcontroller runs an interrupt routine that includes saving the microcontroller registers, disabling the I/O functions, accessing the attribute memory, and providing the results to the host.


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