The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 02, 1997
Filed:
Apr. 25, 1996
Jack E Frayer, Boulder Creek, CA (US);
John D Lattanzi, Palo Alto, CA (US);
Shouchang Tsao, Sunnyvale, CA (US);
Chan-Sui Pang, Sunnyvale, CA (US);
Yueh Y Ma, Los Altos Hills, CA (US);
Bright Microelectronics, Inc., Sunnyvale, CA (US);
Abstract
For negative gate erase and programming of non-volatile floating gate EEPROM devices, large positive or negative voltages from one single negative charge pump and from one single positive charge pump are selectively switched onto a one or more memory sectors of twin-well CMOS negative-gate-erase memory cells. The control gate is negative during erasing and positive during programming. In order for FLASH memories to have minimum layout area, small sectors or arrays of EEPROM cells can be erased all at once using a charge pump which includes two pump capacitors to provide negative voltages to the gate terminals of one or more series PMOS transistors.