The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 12, 1997
Filed:
Apr. 17, 1991
Jeong-Hyeok Choi, Seoul, KR;
Keon-Soo Kim, Suwon, KR;
SamSung Electronics Co., Ltd., Suwon, Kyungki-do, KR;
Abstract
A method for fabricating a non-volatile semiconductor memory device having a storage cell array and a peripheral circuit, capable of controlling thickness of gate oxide layer of peripheral circuit area independently of formation of O--N--O insulation layer on storage cell area, is disclosed. A floating gate of a storage cell array is formed as a first conductive layer on a semiconductor substrate, an O--N--O insulation layer enclosing the floating gate is formed on the top surface of the substrate, and a gate oxide layer of peripheral circuit area is formed by making an oxide layer on the top surface of the substrate after removing the O--N--O insulation layer on the top surface of the peripheral circuit area.