The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 05, 1997

Filed:

Mar. 18, 1996
Applicant:
Inventor:

George L Geannopoulos, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
327143 ; 327142 ; 327198 ;
Abstract

The reset circuit includes a first current mirror coupled to a first terminal of a power supply. A second current mirror is coupled to a second terminal of the power supply. First and second switches couple the first current mirror to the second current mirror. A threshold detector provides a first signal when a current differential between the first and second current mirrors exceeds a predetermined threshold. A first shunt shunts the first current mirror to the first terminal. A second shunt shunts the second current mirror to the second terminal. Buffering circuitry controls the first and second switches and the first and second shunts in response to the first signal. The buffering circuitry further provides a buffered reset signal from the first signal. The buffered reset signal transitions from a first level to a second level in response to the first signal. The switches and shunts reduce the biases on the threshold detector and current mirrors.


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