The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 24, 1997

Filed:

Aug. 15, 1994
Applicant:
Inventors:

Kozo Sakamoto, Hachiouji, JP;

Isao Yoshida, Hinode-machi, JP;

Shigeo Otaka, Takasaki, JP;

Tetsuo Iijima, Maebashi, JP;

Harutora Shono, Gunma-machi, JP;

Ken Uchid, Higashiyamato, JP;

Masayoshi Kobayashi, Takasaki, JP;

Hideki Tsunoda, Akishima, JP;

Assignees:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02H / ;
U.S. Cl.
CPC ...
361 93 ; 361 18 ; 361 91 ; 361103 ; 361115 ;
Abstract

An improvement in conditions that protective functions of an insulated gate semiconductor device with a protection circuit incorporated therein are performed, an improvement in the cutoff of heating, the prevention of malfunctions and an improvement in ease of usage can be achieved. The insulated gate semiconductor device of the present invention comprises a power insulated gate semiconductor element (M9), at least one MOSFET (M1 through M7) for a protection circuit, for controlling the power insulated gate semiconductor element, a constant-voltage circuit using forward voltages developed across diodes (D2a through D2f) for the constant-voltage circuit, and voltage restricting diodes (D1 and D0a through D0d) for controlling the upper limit of a power supply voltage of the constant-voltage circuit. Power to be supplied to the voltage restricting diodes is supplied from an external gate terminal of the power insulated gate semiconductor element. The present invention can bring about an advantageous effect that an improvement in reliability of the insulated gate semiconductor device and an improvement in the ease of use can be achieved.


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