The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 10, 1997
Filed:
Dec. 28, 1994
Intel Corporation, Santa Clara, CA (US);
Abstract
A status bit controlled HDLC accelerator comprises a fully programmable CRC generation circuit, a partial data packet formatting/unformatting capability and a dual-mode register set. The HDLC accelerator includes a set of registers that can be written to and read from directly via a bus interface circuit. Moreover, these registers may be written to and read from at any time so that the state of the HDLC accelerator during a formatting or unformatting operation may be stored in mid-operation. The HDLC accelerator further includes a CRC generation circuit that can perform various checkword generation functions in response to a programmable CRC generator polynomial. In addition, programmable counters within the HDLC accelerator allow partial data packets to be processed which thereby enables formatting and unformatting data packets of all valid bit enumerations.