The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 10, 1997

Filed:

Feb. 10, 1994
Applicant:
Inventors:

Paolo G Cappelletti, Seveso, IT;

Daniele Cantarelli, Villasanta, IT;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438258 ; 438981 ;
Abstract

A process for simultaneously fabricating a flash-EEPROM memory and circuit transistors using a DPCC process. A first polysilicon layer is not removed from the circuit area, and the gate regions of a circuit transistors are formed by shorting first and second polysilicon layers. A thin tunnel oxide layer of the memory cells is formed using the same mask provided for implanting boron into the cell area of the substrate. Following implantation and without removing the mask, the gate oxide formed previously over the whole surface of the wafer is removed from the cell area; the boron implant mask is removed; and tunnel oxidation is performed to increase the thickness of the tunnel oxide by a desired amount, and to slightly increase the thickness of the oxide in the transistor area.


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