The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 10, 1997

Filed:

Nov. 22, 1995
Applicant:
Inventors:

Chih-Chiang Liu, Hsin-Chu, TW;

Po-Wen Yen, Hsin-Chu, TW;

Hsi-Hsin Hong, Nan Tow County, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438 14 ; 216 56 ; 216 59 ; 216 84 ; 438671 ; 438703 ;
Abstract

A process and a monitor structure to measure semiconductor device dimensions, especially contact and via hole dimensions, and proximity effects. The monitor has structures and layers which match the thickness and configuration of the product devices and allow measurement of step heights and proximity measurements. The monitor pattern includes an alignment region for use with automeasurement equipment. Measurements of openings are performed on the monitor at various points during the fabrication process.


Find Patent Forward Citations

Liu, Chih-Chiang. (1997). Method and monitor testsite pattern for measuring critical dimension (U.S. Patent No. 5637186). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5637186

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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