The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 27, 1997
Filed:
Jun. 21, 1995
Terukazu Yusa, Itami, JP;
Kazuhiro Sakashita, Itami, JP;
Isao Takimoto, Itami, JP;
Takeshi Hashizume, Itami, JP;
Tatsunori Komoike, Itami, JP;
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Abstract
Programmable logical blocks (3a to 3c) selected from a block library including information of a plurality of types of programmable logical blocks are disposed in a core region of a semiconductor integrated circuit (100). The degree of freedom of designing a field programmable gate array (FPGA) and the degree of integration are increased. A logic LSI is permitted to have redundancy to flexibly cope with design changes. This affords reduction in develop period and develop costs.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile